Over the last two years, public markets have learned to speak fluent “AI infrastructure”. The language has been dominated by GPUs, HBM stacks, power delivery and, at most, the supporting role of high-speed Ethernet or InfiniBand. The implicit assumption has been simple: feed more FLOPS and memory bandwidth into the system, and the rest will take care of itself.

Reality inside hyperscale datacenters is more nuanced. As clusters scale from ten thousand GPUs to beyond one hundred thousand, the bottleneck quietly shifts from the compute die to the fabric that stitches those dies together. At that scale, power budgets, bandwidth density and signal integrity in the network become as important as TOPS and TFLOPS; the nervous system matters as much as the brain.

Co-packaged optics (CPO) sits exactly at that fault line. Technically, it is a compelling answer to a real problem: it brings optics physically right next to the switch ASIC or accelerator, shortens electrical paths to millimeters, and promises step-function gains in bandwidth density and power efficiency. Broadcom’s 102.4 Tbps Tomahawk 6 CPO Ethernet switch and Marvell’s co-packaged optics architectures for custom AI accelerators are not slides – they are shipping or near-shipping silicon.

But in parallel, CPO comes with real-world friction: manufacturing complexity, nasty yield sensitivities, packaging and thermal challenges, field-serviceability trade-offs, external laser reliability, and a standards landscape that is still forming. That is why, from an investor’s perspective, the key distinction is this: the technology thesis and the equity thesis are not the same thing. CPO can be a technically sound architectural shift and still be adopted in slow, workload-selective waves between 2026 and 2028 rather than as a sudden, universal standard.

The real battle in AI datacenters is no longer fought exclusively at the compute core. It is increasingly fought in the optical nervous system around that core – in switch ASICs, optical engines, lasers, advanced packaging and the small number of suppliers that can make all of this work at scale.

At its core, co-packaged optics is a packaging decision. Instead of routing high-speed electrical signals from a switch ASIC across a PCB to front-panel pluggable modules, CPO brings the optical engines onto the same package or substrate as the ASIC itself. The electrical distance between SerDes and optics shrinks from centimeters to millimeters; the conversion from electrical to optical happens essentially at the edge of the chip.

In the traditional pluggable model, a high-radix Ethernet or InfiniBand switch sits on a line card, connects over lossy PCB traces to a row of QSFP/OSFP modules at the edge, and only then launches into fiber. At 100–200 Gbps per lane, those traces become extremely challenging: insertion loss rises, equalization gets harder, and power-hungry retimers or complex analog front-ends are required to keep links error-free.

CPO changes where the pain is handled. Optical engines – typically silicon photonics dies with integrated modulators, waveguides and photodiodes – sit right next to the switch ASIC on a shared substrate. The high-speed SerDes links from the ASIC terminate within millimeters, not tens of centimeters. Electrical losses and jitter drop; the “heroics” needed in analog signal conditioning are reduced, which directly improves power per bit.

Silicon photonics is the enabler. CMOS-compatible photonics platforms integrate optical waveguides, modulators and detectors into a process that can be co-packaged with logic and drivers. In a CPO design:pmc.

The switch ASIC, optical engine, laser, fiber and substrate form a tightly coupled system. The ASIC’s SerDes lanes fan out through high-density organic or silicon interposers into photonic engines. Those engines perform the electrical–optical conversion and connect to high-density fiber ribbons that leave the package. Lasers, kept external for reliability and thermal reasons, are connected via optical couplers. This “optics next to silicon” architecture is what people mean when they say CPO is about “bringing optics closer to the chip”.

Technically, CPO has three primary goals:

CPO is not about just one of bandwidth, power or latency; it is a joint optimization across all three. For investors, the most monetizable pieces are power per bit and bandwidth density, because those directly expand hyperscaler budgets and support premium pricing for the few players who can deliver them at scale.

The AI training narrative has quietly moved from “multi-thousand GPU clusters” to “tens of thousands to 100k+ GPU clusters”. This is not just a marketing escalation; large foundation models, longer context windows, and mixture-of-experts architectures genuinely need more parallel hardware. Yet at these scales, simply adding more GPUs does not linearly add effective compute. Fabric design starts to dominate.

Networking power budgets spike as clusters scale. Every GPU added must be connected with high-speed links through one or more layers of switches. At 800G or 1.6T per port, conventional pluggable optics and long PCB runs can consume a double-digit percentage of the total rack or row power. As a result, “watts per transported bit” becomes as critical as “watts per TFLOP”.

Bandwidth density per switch also becomes central. A 102.4 Tbps switch like Broadcom’s Tomahawk 6, with 200 Gbps per lane and configurations up to 64 × 1.6T ports, enables much flatter topologies: two-tier fabrics with fewer hops, fewer devices and less oversubscription. Broadcom positions Tomahawk 6-based fabrics as capable of interconnecting 100k+ accelerators in two tiers. That directly affects GPU utilization – fewer bottlenecks, fewer congestion hot spots, and fewer wasted GPU cycles.

The real economic problem in large AI training runs is not just raw compute. It is the cost of idling very expensive GPUs while they wait for data, or while jobs are restarted due to fabric glitches. Link flaps, intermittent errors and retrains in a multi-week training job translate into wasted GPU hours and delayed time-to-market. CPO, by improving signal integrity and reducing opportunities for bit errors in the ASIC–optics segment, can meaningfully cut link-related job failures. Every avoided restart is effectively reclaimed revenue-generating GPU time.

Where exactly does CPO sit in this data movement problem? It does not replace NVLink or direct GPU–GPU links within a node. It does not eliminate copper inside the rack for very short distances. Instead, it targets the “ASIC to optical” transition in top-of-rack and spine/leaf switches: the most stressed, power-hungry and bandwidth-constrained part of the fabric. That is where electrical paths are longest and where pluggable constraints bite the hardest.

From an economic standpoint, the impact chain looks like this:

For a hyperscaler running multi-MW AI datacenters, these effects are not marginal; they can shift the economics of an entire generation of facilities. CPO is, therefore, not just a speed upgrade – it is an economic lever on TCO and time-to-market, even though it only touches a slice of the data movement problem.

CPO’s advantages are multi-dimensional, but all of them translate in some way to money.

Power efficiency is the headline. By placing optical engines adjacent to the switch ASIC and trimming away retimers and heavy equalization, CPO designs like Tomahawk 6 claim over 3.5× improvement in optical interconnect power versus comparable pluggable architectures, and roughly 70% system-level optical power savings. In a hyperscale AI cluster drawing tens of megawatts, that level of savings equates to several megawatts of freed capacity. That capacity can either lower utility bills or be reallocated to more GPUs; both outcomes support the willingness to pay for premium CPO hardware.

Bandwidth density is equally important. A single 102.4 Tbps CPO switch with 200 Gbps lanes and 1.6T ports allows dramatically dense fabrics in a 1U or 2U footprint. This enables flatter network topologies with fewer tiers, less oversubscription and fewer cables. For AI training, this translates directly into easier scaling from 10k to 100k+ GPUs without exploding the number of switches or the complexity of cabling.

Shorter electrical paths and improved signal integrity are the unsung heroes. By keeping SerDes traces to a few millimeters between ASIC and optical engine, CPO reduces insertion loss, jitter and crosstalk, which translates into lower error rates and fewer link flaps. Broadcom’s own analysis points to substantial improvements in link stability on CPO-based systems compared to pluggable equivalents. Fewer flaps and recoveries mean fewer slowdowns and restarts at the job level – again, higher effective GPU utilization.

Latency, strictly in terms of propagation delay, does not change; light still travels at the same speed in fiber. However, CPO reduces the number of electrical inches and analog processing stages, and supports topologies with fewer switch hops. That combination can reduce both mean latency and jitter. For communication-heavy training methods – pipeline parallelism, tensor parallelism, model-parallel MoE – even modest reductions in fabric latency can materially shorten training times.

Finally, rack-scale and multi-rack connectivity benefit from cleaner mechanical and cabling designs. Higher bandwidth per U and per port yields fewer cables, shorter runs and less physical complexity. Modern AI datacenters already struggle with cable management at 800G; 1.6T and beyond make it worse under the traditional model. CPO’s ability to pack more bandwidth into the same rack footprint with fewer conversion stages is a non-trivial operational advantage.

Taken together, these advantages make CPO a serious technology. It is not a marketing gimmick; it is an engineering answer to power, density and reliability constraints that are now binding in the real world.

The technical case for CPO is strong; the deployment case is more complicated.

Manufacturing complexity and yield are first-order concerns. A CPO module combines a large, advanced-node switch ASIC, multiple photonic dies, complex substrates and often advanced 2.5D or 3D packaging. Any defect in any of these components can kill the entire assembly. Early yields can be significantly lower than for discrete ASIC + pluggable systems. That yield drag shows up as higher cost per working port and can erode the economic advantage in the early generations.

Field-serviceability is a cultural and operational challenge. Pluggable optics have entrenched an operating model built around hot-swapping failed modules at the port level. CPO removes that modularity: if an optical engine on a CPO line card fails, you may need to replace the entire card or module, not just a single transceiver. That changes RMA flows, spares strategies and even the skill sets of datacenter technicians. Large organizations are slow to rewire this muscle memory.

Laser reliability and thermal management add to the risk. Modern CPO designs, including Broadcom’s Tomahawk 6, explicitly keep lasers external – in ELSFP-like modules – to preserve field-serviceability and avoid adding even more heat into the package. Nonetheless, placing high-power ASICs and dense optical engines in close proximity pushes power density up. Liquid cooling or more advanced thermal solutions become necessary, not optional. Any gap between lab assumptions and field reality on thermal behavior can materially impact reliability.

Standardization is still emerging. Pluggable optics ride on well-established OIF, IEEE and MSA ecosystems; there are multiple vendors, clear form factors, and well-understood interoperability. CPO, by contrast, is still dominated by vendor-specific implementations. There is no universal, mature multi-vendor standard for CPO modules or interfaces yet. That raises vendor lock-in concerns at hyperscalers: adopting one vendor’s CPO platform means tying your fabric roadmap tightly to that vendor’s silicon.

Meanwhile, alternatives are getting better. Linear Pluggable Optics (LPO) aims to deliver a significant share of CPO’s power savings by simplifying the analog and DSP chain in pluggable modules, without the packaging risk. 800G and 1.6T pluggable modules continue to evolve, and for short distances (particularly intra-rack), copper remains cost-effective and latency-optimal. NVIDIA, for instance, continues to emphasize copper for very short-reach connections while talking about CPO and NPO in parallel.

There is no physical law that forces all fabrics above some speed to switch to CPO overnight. The more “good enough” LPO and pluggables are at 800G/1.6T, the slower CPO adoption will be – particularly outside the most extreme AI cluster designs.

Put simply: CPO can be technically strong and still adopt in discrete waves. The most constrained and expensive fabrics – top-tier AI clusters in the biggest hyperscalers – are likely to move first. A long tail of more conventional datacenter networks may stay with LPO/pluggable/copper combinations for multiple generations.

To find the alpha, you have to map the stack.

At the top sits the switch ASIC layer. Here, Broadcom, NVIDIA and Marvell form an oligopoly. These are 51.2–102.4 Tbps and beyond devices with advanced congestion control and CPO interfaces. The technical and commercial entry barriers are enormous: world-class design teams, deep IP portfolios, close hyperscaler relationships and long qualification cycles. Pricing power is high; even hyperscalers have limited credible alternatives.

Next is the optical engine layer. This is where silicon photonics dies, drivers/TIAs and fiber arrays come together. Coherent and Lumentum stand out as high-end engine suppliers; Innolight and Eoptolink are important in China; Broadcom and Marvell also integrate optical engines into their platforms through internal designs and partnerships. Barriers are high – photonic design and manufacturing are non-trivial, and CPO qualification is stricter than for pluggables. Pricing power is moderate to high, but there is mounting price pressure from Chinese vendors at the low end.

Silicon photonics foundries like TSMC, Intel and GlobalFoundries provide the underlying photonic platforms. TSMC’s COUPE platform is explicitly used in Broadcom’s CPO engines for Tomahawk 6. While the technical barrier is high – process development, PDKs, packaging integration – CPO’s absolute share of foundry revenue is still relatively small. Value here looks more like “portfolio uplift” than a standalone driver.

External laser sources form another concentrated segment. Coherent (ex-II-VI), Lumentum and Applied Optoelectronics all play here. Lasers are one of the most reliability-sensitive components in the chain; any weakness here undermines the entire CPO proposition. That gives technically strong players meaningful pricing power, particularly for high-power, high-reliability ELSFP-style modules.marvell-prod-65.

Fiber and cable are dominated by Corning, Prysmian, YOFC and peers. This is a scale game with relatively commoditized products. CPO increases port counts and thus fiber demand, but margins remain constrained; the lever is volume, not price.

Advanced packaging and OSATs are the stealth critical layer. TSMC, ASE Technology and Amkor sit at the center of this universe. CPO’s multi-die, high-density, often 2.5D/3D packaging cannot be done just anywhere; facilities and expertise are limited and expensive. Entry barriers are extremely high. While pricing remains negotiated project-by-project, the combination of capacity scarcity and complexity grants these players real bargaining power.

Substrate manufacturers (Ibiden, Shinko, Unimicron, etc.) are further in the background but structurally important. High-layer-count, low-loss substrates with fine lines are prerequisites for 200–400 Gbps per lane SerDes and integrated photonics. As CPO volumes grow, this niche can experience supply constraints and improved pricing. Public disclosure is thin (“Unavailable” on CPO-specific breakdowns in many cases), but logically this is a high-leverage point.

Test & measurement vendors – Teradyne, Advantest, Keysight – benefit from CPO’s test complexity. Co-packaged designs require both electrical and optical characterization at very high speeds, which means more test time and more sophisticated equipment. The impact is diluted across broader portfolios, but directionally positive.

Network systems vendors like Cisco, Arista, NVIDIA and several ODMs wrap all of this into box-level products. Competition is tougher here; hyperscalers often pursue whitebox designs and direct engagement with silicon vendors. Pricing power is lower than in the silicon layers; differentiation is more about software, management and integration than about the underlying CPO innovation.

Foundry/manufacturing as a whole – TSMC, GlobalFoundries, UMC, OSATs and EMS providers like Fabrinet – sees CPO as another source of high-value, complex work. Leading-edge nodes and advanced packaging capacity are already scarce; CPO adds more demand.

The sharpest value acumulation is in three clusters – switch ASIC, optical engine/laser, and advanced packaging. Fiber/cable and systems are more competitive and margin-constrained. Foundry, substrates and test are indirect beneficiaries that ride both the AI compute wave and CPO’s added complexity.

Translating this stack into tickers yields a heterogeneous picture.

NVIDIA (NVDA) sits across compute, networking and systems. On the CPO front, it has networking silicon (Spectrum, Quantum), NICs and a roadmap that includes near-packaged optics (NPO) and eventually CPO-like integration around GPUs. Today, however, the stock’s valuation is overwhelmingly anchored in GPU economics. CPO is a supportive narrative and a future incremental driver, not the core of the equity story. Time horizon: 1–5 years. Key risk: if CPO adoption is slower, NVIDIA leans on copper and LPO for longer, delaying any CPO-driven differentiation in its networking business.

Broadcom (AVGO) is the purest public play on CPO-enabled switching. Tomahawk 6 – Davisson, with 102.4 Tbps and co-packaged optics, is a flagship product aimed squarely at AI fabrics. Broadcom already dominates merchant switch ASICs; CPO extends that lead into the next performance regime. In valuation terms, though, CPO is one thread in a broader AI networking and custom ASIC thesis. Time horizon: 0–5 years. Main risk: if LPO and advanced pluggables prove “good enough” for more fabrics, CPO’s total addressable market and payback period could be smaller or longer than the current narrative suggests.

Marvell (MRVL) combines optical DSPs, datacenter switching and co-packaged optics architectures for both switches and custom AI accelerators. Its partnership with Coherent on 1.6T optics and CPO demos positions it as a central player in the transition from 800G pluggables to 1.6T CPO/LPO hybrids. The stock has already rerated on the broader “AI optics” narrative. Time horizon: 1–5 years. Key risk: CPO remains a smaller share of the mix than LPO/pluggable, and DSP margins are squeezed by intense competition.

Cisco (CSCO) is a systems-level beneficiary at best. It can integrate CPO-capable silicon from Broadcom/Marvell into its switches, but hyperscalers often prefer ODM or in-house designs for AI fabrics. CPO’s upside flows through Cisco only to the extent that its AI-focused systems gain share. Time horizon: 2–5 years. Risk: hyperscalers bypass traditional OEMs in favor of custom or whitebox designs.

Arista Networks (ANET) occupies a similar space: a cloud-focused switching vendor that can package CPO into high-density systems for AI clusters. Success depends heavily on how aggressive cloud providers are in adopting non-custom, off-the-shelf CPO-based systems versus custom or ODM solutions. Time horizon: 1–4 years. Risk: hyperscalers decide to keep the CPO configurations closer to silicon vendors and design houses.

Coherent (COHR) is a direct optical engine and silicon photonics beneficiary. Its 1.6T optics and silicon photonics platforms, co-demonstrated with Marvell, make it a natural supplier into CPO and LPO ecosystems. Time horizon: 1–5 years. Risk: price pressure from Chinese vendors, and the possibility that CPO volumes lag while more of the growth happens in pluggables and DCI.

Lumentum (LITE) is another key supplier of lasers and high-speed optical modules. Its technology roadmap (e.g., 450G per lambda) aligns with future 1.6T and beyond modules. CPO and LPO, as well as coherent DCI, all offer avenues for growth. Time horizon: 1–5 years. Risk: hyperscaler consolidation and aggressive vendor rationalisation can compress margins.

Corning (GLW) benefits from higher fiber port counts as CPO increases bandwidth per switch, but the relationship is second-order. Its economics are driven by overall fiber demand across telecom, enterprise and hyperscale, of which CPO is a subset. Time horizon: ongoing. Risk: commoditization and limited pricing power; CPO is unlikely to create a differentiated premium for fiber.

Ciena (CIEN) plays primarily in coherent optical and DCI, not in intra-datacenter CPO. AI datacenter interconnect demand is a positive driver, but CPO adoption inside the datacenter is only an indirect factor. Time horizon: 0–5 years. Risk: telecom spending cycles and competition weigh heavier than CPO itself.

Applied Optoelectronics (AAOI) supplies high-speed pluggable modules to large cloud customers. It is positioned to benefit from the continued growth of 800G/1.6T pluggables and perhaps LPO, rather than from CPO directly. Time horizon: 0–3 years. Risk: customer concentration and exposure to pricing pressure from Chinese competitors.

Fabrinet (FN) is an EMS/ODM that manufactures optical modules and complex assemblies for others. As CPO and LPO volumes grow, it can capture volume and complexity-based margin in production. Time horizon: 1–5 years. Risk: customer concentration and margin pressure as OEMs negotiate aggressively.

TSMC (TSM) is a foundational enabler. Its COUPE silicon photonics platform is used in Broadcom’s CPO engines, and its advanced packaging lines are key to multi-die integration. CPO is a clear positive, but one of many across AI GPUs, CPUs and accelerators. Time horizon: 1–5 years. Risk: CPO’s share of TSMC’s revenue remains modest relative to the broader AI compute wave.

GlobalFoundries (GFS) offers photonics platforms but has a more limited role in cutting-edge AI CPO switches compared with TSMC and Intel. Time horizon: 2–5 years. Risk: niche positioning in the AI-centric part of photonics.

Amkor (AMKR) and ASE Technology (ASX) stand out on advanced packaging. Both have the capabilities to assemble complex CPO modules and high-density AI packages. As CPO volumes increase, they stand to leverage their scarce skills and capacity into higher-value engagements. Time horizon: 1–5 years. Risk: hyperscalers and big chip vendors internalize more packaging, and CPO volume curves lag optimistic scenarios.

Teradyne (TER) benefits from CPO’s test complexity – more sophisticated, high-speed testers, longer test times and new test flows. Exposure is indirect; the impact is spread across a broad semiconductor test portfolio. Time horizon: 1–5 years. Risk: cyclical swings in semis overshadow the incremental uplift from CPO.

The cleanest CPO leverage sits with AVGO and MRVL on the silicon side, COHR/LITE on the optical engine/laser side, and AMKR/ASX on the packaging side. NVDA’s CPO upside is meaningful but diluted within a much larger compute story. GLW/CIEN see mostly indirect effects.

From a “moat” perspective, the densest economic power is tightly concentrated.

In switch ASICs, Broadcom, NVIDIA and Marvell effectively control the merchant high-end. Entry barriers are extreme, and hyperscalers are hesitant to bet on newcomers for such critical infrastructure. That entrenched oligopoly can sustain premium pricing as long as performance roadmaps stay ahead of internal/custom silicon efforts.

In optical engines, Coherent, Lumentum and a small set of Chinese players dominate CPO-capable silicon photonics engines. Qualification cycles are long, photonics IP is hard to replicate, and the penalty for failure is severe. This yields project-level pricing power, especially in high-end AI fabrics.

Silicon photonics foundries (TSMC, Intel, GFS) and external laser suppliers (Coherent, Lumentum, AOI) form smaller, high-barrier clusters with moderate to high pricing power. The combination of intricate process development and reliability demands limits the number of credible suppliers.

Advanced packaging/OSAT firms (TSMC’s InFO/CoWoS, ASE, Amkor) arguably sit at one of the most constrained choke points in the chain. CPO requires their highest-complexity capabilities. Capacity is not infinite; CPO must compete with GPUs, CPUs and networking ASICs for those lines. That scarcity grants them meaningful leverage in negotiations.

Network systems vendors, in contrast, operate in a more crowded and price-sensitive environment. Here, moats are more about software and integration than about CPO itself.

The fewest credible players and the highest entry barriers are found in switch ASICs, optical engines/lasers, and advanced packaging. That is where enduring pricing power and structural returns are most likely to reside as CPO matures.

Broadcom (AVGO) has seen its multiple expand on the back of AI exposure broadly, including custom accelerators and switches. Tomahawk 6 and its CPO architecture reinforce the AI networking narrative, but it is hard to ascribe a discrete “CPO premium” beyond the broader AI uplift. CPO looks more like an embedded assumption than a separate call option; AVGO would still be a strong AI name without it, and CPO success simply steepens the curve.

Marvell (MRVL) has rerated in part on the back of “AI optics” and datacenter interconnect. Its CPO and 1.6T roadmap with Coherent are prominent in that story. Yet, much of the near-term revenue comes from DSP-based pluggables and LPO, not from CPO. The stock thus embodies a mix of realized opto-DSP demand and more speculative CPO upside.

NVIDIA (NVDA) trades as the primary AI compute proxy. Its emerging CPO/NPO ambitions in networking are value-accretive but secondary in the current multiple; the market does not yet price NVDA as a CPO-heavy story.

Coherent (COHR) and Lumentum (LITE) see AI and 800G/1.6T demand reflected in their valuations. Their CPO-exposed businesses are wrapped into a general “optical cycle” narrative that also includes telecom and DCI. CPO’s contribution is present but not isolated. That leaves room for both upside (if CPO volumes and margins surprise positively) and downside (if they lag).

Corning (GLW) and Ciena (CIEN) largely reflect their broader fiber and coherent transport exposure. CPO is only one of many drivers; AI DCI demand is more important for CIEN than intra-DC CPO adoption.

In most large caps, CPO is folded into a generic AI networking/optics narrative rather than line-item priced. For investors, that means CPO is mostly a free or cheap call option in many blue chips, while in deep supply chain names it may still be underappreciated.

If the obvious plays are crowded, where could the asymmetry lie?

Amkor (AMKR) and ASE Technology (ASX) stand out as under-discussed leverage points. CPO packages are among the most complex assemblies in the industry; high-speed digital, photonics, advanced substrates and thermal management must all be orchestrated in a single module. Very few OSATs can do this reliably at scale. If CPO volumes ramp meaningfully, these firms can see both higher utilization and richer mix. Their AI story today is quieter than that of GPU vendors, but structurally they sit at a real bottleneck.

Substrate manufacturers like Ibiden, Shinko and Unimicron also fit the “hidden winner” pattern. They are essential, not optional, for 200–400 Gbps per lane SerDes and CPO-style modules. As CPO adoption grows, high-end substrates can become tight; pricing power can improve in a segment that has historically been treated as quasi-commodity. Lack of explicit CPO disclosures (“Unavailable”) hides this leverage from many screens.

Test equipment suppliers – Teradyne, Advantest – gain from CPO’s testing demands. While they are not pure plays on CPO, they sit in a structurally advantaged spot: higher speeds, more complex combinations of optical and electrical interfaces, longer test flows.

Chinese optical players like Innolight and Eoptolink are another class of under-followed names. They will be critical suppliers of 800G/1.6T pluggables and potentially CPO-compatible engines into Chinese AI datacenters. Geopolitics and listing locations reduce foreign investor participation, but local markets may not fully price AI/CPO optionality yet.

The most interesting asymmetry may be in precisely those segments that are indispensable to CPO but are not branded as “AI leaders”: OSATs, substrates, test, and second-tier optics suppliers.

To maintain balance, it is important not to crown CPO as destiny.

Pluggable optics remain the workhorse of datacenter connectivity. 400G, 800G and 1.6T modules are widely supported; they are modular, replaceable and backed by multi-vendor ecosystems. Operational teams know how to handle them; spare strategies and failure modes are well-understood.

LPO offers a path to lower power without abandoning pluggables. By eliminating or simplifying DSPs and reducing analog complexity, LPO can deliver significant power savings at shorter distances with far less architectural disruption than CPO. For many intra-rack or short-reach links, LPO may be “good enough” for years.

Copper retains its supremacy for very short distances. Active and passive direct-attach cables still offer lower latency and cost in the first few meters, and vendors like NVIDIA are explicit about copper’s continued role. CPO does not change the speed of electrons over 10–50 cm on a board; it changes where you decide to hand off to photons for longer runs.

Near-packaged optics (NPO) blur the line between CPO and pluggables. By relocating optical engines very close to the ASIC on the PCB, NPO can capture some of CPO’s power and signal integrity benefits without fully integrating optics into the package. Many roadmaps show mixed NPO/CPO architectures as intermediate steps.

Silicon photonics itself is broader than CPO. The same photonic platforms underpin advanced pluggable modules, LPO, coherent DCI and future on-package optical memory links. Investing in photonics is not the same as making a pure CPO bet.

Optical circuit switching adds yet another layer: in the long run, large fabrics may use optical circuits to build logically flat networks while retaining CPO or pluggables at the edges. That is more of a 5–10 year story but relevant to assessing how stable CPO’s role will be.

CPO is a powerful tool, not a singular destiny. It is most likely to become critical in the most constrained, highest-value AI clusters – where every watt and nanosecond counts – while LPO/pluggable/copper combinations continue to serve a broad middle of the market.

In the next 0–12 months, CPO will mostly manifest as announcements, demos and early deployments. Broadcom is already shipping Tomahawk 6 CPO switches into initial AI workloads, and Marvell is actively showcasing its CPO platforms. Revenue contribution is real but not yet dominant. The main beneficiaries in this phase are the storytellers – AVGO, MRVL, NVDA – whose AI networking narratives gain credibility.

Over 1–3 years, the first meaningful wave of CPO-based fabrics at hyperscalers is likely to appear. Spine/aggregation layers in a handful of large AI datacenters will shift to CPO; volume ramps will show up in switch ASICs, optical engines, lasers and advanced packaging. This is when CPO becomes a visible revenue line for the key suppliers.

In the 3–5 year window, standardization and ecosystem maturity can enable broader adoption across more datacenters and more vendors. CPO may become the default choice for certain classes of AI fabrics. At this point, OSATs, substrates and test vendors start seeing more pronounced uplift, and system vendors can bring CPO-based systems to a wider market.

Beyond 5 years, the game may shift again toward deeper optical integration into compute packages – optics within GPUs/XPUs, photonic memory links, and perhaps entirely new fabric paradigms. CPO as we define it today might evolve or be partially subsumed by this integration. The winners then will likely be those who control both compute and photonics platforms, and the advanced packaging infrastructure that binds them.

For investors, this staging implies that CPO is a medium-term rather than a short-term earnings driver, especially outside the largest switch and optics names. Early hype can run ahead of fundamentals; patience and positioning along the value chain will matter.

Several risks could derail or delay the CPO thesis:

Technically, CPO addresses a real, tightening constraint: power and bandwidth at the ASIC–optics boundary as AI datacenters scale. Devices like Tomahawk 6 demonstrate that those constraints can be relaxed significantly with a co-packaged approach. On this axis, CPO is closer to a structural breakthrough than to hype.

Financially, the picture is different. GPUs and HBM sit at the center of the AI trade; CPO is a peripheral but important enabler. In big names like AVGO, MRVL and NVDA, CPO is embedded inside a broader AI infrastructure premium; the equity risk is diffused across multiple products and trends. In smaller, more focused players, CPO adoption curves, qualification cycles and hyperscaler decisions can drive outsized volatility.

The deeper question – is value in the GPU or in the surrounding optical nervous system? – is time-dependent. Today, the GPU captures most of the economic rent; the optical stack is catching up. As clusters push beyond 100k GPUs and networking consumes larger fractions of capex and opex, bargaining power tends to shift toward those who can solve the network bottleneck: switch ASIC vendors, optical engine/laser suppliers and advanced packaging houses.finance.

If CPO adoption underwhelms, the biggest disappointment is likely to occur in niches where CPO is central to the growth story and diversification is limited – certain optical or packaging names that marketed heavily around CPO but rely on AI volumes that may, in practice, flow into LPO and pluggables instead. In contrast, diversified leaders will see CPO as one of several levers; the downside is less dramatic.

In other words: CPO is a real answer to a real bottleneck, but the market’s capacity to turn that into sustainable equity alpha depends on picking the right layer and the right timing.

On the technical side, CPO is robust. By bringing optics to the edge of the chip, it delivers higher bandwidth density, lower power per bit and better link robustness at precisely the point where traditional architectures are starting to break. It is not a fad; it is an architectural response to physics and economics.

On the pricing side, the market has broadly recognized that networking and optics matter in AI, but it has not fully decomposed the CPO value chain. In large caps, CPO is mostly a cheap embedded option inside broader AI and networking narratives. In the deep supply chain – advanced packaging, substrates, select optical engines/lasers and Chinese optics – CPO’s potential remains under-articulated and partially underpriced.

For investors seeking asymmetry, the most attractive opportunities likely lie not at the GPU, but in the narrow, oligopolistic choke points of the optical nervous system: merchant switch ASICs, high-end optical engines and lasers, and the advanced packaging houses capable of stitching it all together. GPUs will continue to dominate headlines and multiples; CPO is more subtle – a structural shift whose economic rent will partially accrue to a small set of players that are, for now, much less visible in the AI narrative.

CPO is not pure hype. It is a technically credible bid to solve the next network bottleneck in AI datacenters. But in the near term it is also not a universal standard; it will roll out selectively, in operationally demanding environments, and in lockstep with hyperscalers’ willingness to pay for power and bandwidth headroom. The first wave of outsized, durable value may well appear not at the center of the GPU trade, but in the constrained, under-owned supply chain that surrounds the GPU and turns it into a usable, optically connected system.